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15.1. I C Reserved I C Addresses ................................................................................................................ 147
15.2. I C Clock Modes ............................................................................................................................... 149
15.3. I C Interactions in Prioritized Order ....................................................................................................... 152
15.4. I C Master Transmitter ........................................................................................................................ 154
15.5. I C Master Receiver ........................................................................................................................... 156
15.6. I C STATE Values ............................................................................................................................. 157
15.7. I C Transmission Status ...................................................................................................................... 157
15.8. I C Slave Transmitter ......................................................................................................................... 160
15.9. I C - Slave Receiver .......................................................................................................................... 161
15.10. I C Bus Error Response .................................................................................................................... 162
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List of Tables
2.1. Register Access Types ............................................................................................................................ 3
3.1. Energy Mode Description ......................................................................................................................... 8
3.2. EFM32G Microcontroller Series ................................................................................................................. 9
4.1. Interrupt Request Lines (IRQ) .................................................................................................................. 12
5.1. Memory System Core Peripherals ............................................................................................................ 16
5.2. Memory System Low Energy Peripherals ................................................................................................... 16
5.3. Memory System Peripherals .................................................................................................................... 17
5.4. Device Information Table ........................................................................................................................ 21
7.1. MSC Flash Memory Mapping .................................................................................................................. 28
7.2. Lock Bits Page Structure ........................................................................................................................ 29
7.3. Revision Number Interpretation ................................................................................................................ 30
8.1. AHB bus transfer arbitration interval ......................................................................................................... 40
8.2. DMA channel priority ............................................................................................................................. 41
8.3. DMA cycle types ................................................................................................................................... 42
8.4. channel_cfg for a primary data structure, in memory scatter-gather mode ......................................................... 46
8.5. channel_cfg for a primary data structure, in peripheral scatter-gather mode ...................................................... 48
8.6. Address bit settings for the channel control data structure ............................................................................. 51
8.7. src_data_end_ptr bit assignments ............................................................................................................ 52
8.8. dst_data_end_ptr bit assignments ............................................................................................................ 53
8.9. channel_cfg bit assignments ................................................................................................................... 53
8.10. DMA cycle of six words using a word increment ........................................................................................ 56
8.11. DMA cycle of 12 bytes using a halfword increment .................................................................................... 57
9.1. RMU Reset Cause Register Interpretation ................................................................................................. 78
10.1. EMU Energy Mode Overview ................................................................................................................. 86
10.2. EMU Entering a Low Energy Mode ......................................................................................................... 87
10.3. EMU Wakeup Triggers from Low Energy Modes ....................................................................................... 88
13.1. Reflex Producers ............................................................................................................................... 127
13.2. Reflex Consumers ............................................................................................................................. 128
14.1. EBI Timing ....................................................................................................................................... 138
2 2
2
2
2
2
2
2
2
2
2
16.1. USART Asynchronous vs. Synchronous Mode ........................................................................................ 179
16.2. USART Pin Usage ............................................................................................................................. 179
16.3. USART Data Bits ............................................................................................................................... 180
16.4. USART Stop Bits ............................................................................................................................... 180
16.5. USART Parity Bits ............................................................................................................................. 181
16.6. USART Oversampling ......................................................................................................................... 181
16.7. USART Baud Rates @ 4MHz Peripheral Clock ....................................................................................... 182
16.8. USART SPI Modes ............................................................................................................................ 194
16.9. USART IrDA Pulse Widths .................................................................................................................. 197
17.1. UART Limitations ............................................................................................................................... 218
18.1. LEUART Parity Bit ............................................................................................................................. 221
18.2. LEUART Baud Rates ......................................................................................................................... 222
19.1. TIMER Counter Response in X2 Decoding Mode ..................................................................................... 250
19.2. TIMER Counter Response in X4 Decoding Mode ..................................................................................... 250
19.3. TIMER Events ................................................................................................................................... 259
20.1. RTC Resolution Vs Overflow ............................................................................................................... 280
21.1. LETIMER Repeat Modes ..................................................................................................................... 289
21.2. LETIMER Underflow Output Actions ...................................................................................................... 294
22.1. PCNT QUAD Mode Counter Control Function ......................................................................................... 312
23.1. Bias Configuration .............................................................................................................................. 324
24.1. Bias Configuration .............................................................................................................................. 334
25.1. ADC Single Ended Conversion ............................................................................................................. 348
25.2. ADC Differential Conversion ................................................................................................................ 349
25.3. Oversampling Result Shifting and Resolution .......................................................................................... 349
25.4. ADC Results Representation ................................................................................................................ 350
25.5. Calibration Register Effect ................................................................................................................... 351
28.1. Pin Configuration ............................................................................................................................... 394
29.1. LCD Mux Settings .............................................................................................................................. 416
29.2. LCD BIAS Settings ............................................................................................................................ 416
29.3. LCD Wave Settings ............................................................................................................................ 416
29.4. LCD Contrast .................................................................................................................................... 427
29.5. LCD Contrast Function ....................................................................................................................... 427
2011-04-12 - d0001_Rev1.10
463
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